The following blog discusses about one of the most important topics in Computer Organizations and Architecture, how computers work, specifically how information moves between the things you plug into a computer (like a printer or a mouse) and the computer's main storage. It's called the I/O interface. We use special connections to link the computer's brain (CPU) with these devices, making sure they can communicate smoothly even if they're different from each other.
There are three Modes of transfer:
Programmed I/O Transfer
Interrupt Initiated I/O Transfer
DMA (Direct Memory Access)
1.Programmed I/O Transfer :-
In Programmed I/O each data Transfer is initiated by an instruction in a computer program.
If any computer system I/O operation or completely by the processor then that system is said to be using programmed I/O.
When such a technique is used processor execute program that initiate, direct, and terminate the I/O operations, including sensing device status, sending read or write command and transferring the data.
It is the complete responsibility of the processor required constant monitoring of the I/O interface and IOP.
No other test will be perform during the data transfer. It is the time consuming processor, it keeps processor busy.
2. Interrupt Initiated I/O Transfer :-
Time consuming limitation of program I/O is avoided by interrupt facility. In the means time the processor can execute another program, when the interface determine the device for ready for data transfer, it generate and interrupt request to the computer.
On detecting the external interrupt interrupt the processor stop the executing program and serve the I/O transfer.
After this servicing is completed, the processor word resume exactly where it left off.
3. DMA (Direct Memory Access):-
When large amount of data are to be transfer the most efficient technique is known as DMA.
DMA is the technique for data transfer b/w internal and external storage or processor and peripheral without intervention on CPU.
Bus request (BR) input is used by DMA controller to request the processor to give up the bus control.
Bus grant (BG) is an output from CPU to inform external DMA controller the status of buses.
In DMA burst transfer, a block sequence consisting of number of memory words is transfer in a continuous while the DMA controller is the master of memory.
In cycle stealing method, which allow DMA controller to transfer one data word at a time after that it must return control of Buses to the CPU.
Here, DMA controller "steal" one memory cycle from processor.
DMA Controller:-
DMA controller required a circuit of an interface to communicate with the processor and I/O device.
It consist of an address register and word count register. The address register and address line are used for direct communication with memory.
A word count register specify the number of word that must be transfer.
It is decremented by one after each word is transfer.
The address register content and address of desired location in memory. The address bits go through bus buffer into the address buses.
Content register specify the mode of transfer.
The register in DMA are selected by the processor through address bus by enabling DS(DMA select) and RS (Register select) inputs .
The RD(Read) WR (Write) lines are Bi-directional.
when BG=0 the processor can communicate with the DMA Register through the data bus to read from or write to the DMA registers.
When BG=1 the processor give up the control over the buses and DMA can communicate Directly with the memory.
DMA Transfer:-
When the peripheral device send a DMA request to DMA controller , DMA controller activate BR line and the processor response with the BG line (Bus Grant line) informing that the buses are disabled are activated.
Then DMA puts the current value of its address register into the address bus initiates RD(Read) WR(Write) line and sends and DMA acknowledgement to the peripheral device.
On receiving a DMA acknowledgement the I/O device puts a word in data bus (for write) or receive a word from data bus (for Read).
Thus the peripheral unit can communicate with the memory without processor intervention.
Conclusion
In this article, we learned about different modes of transfer, Programmed i/O, Interrupt-initiated I/O, and Direct Memory Access (DMA), and their advantages and disadvantages. I hope this article was helpful.
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